In general, an electrothermal transducer (heater) of a printhead mounted on a printing apparatus in accordance with an ink-jet scheme and the driving circuit of the transducer are formed on the same substrate using semiconductor process technology as illustrated in, e.g., U.S. Pat. No. 6,290,334. In a proposed printhead structure, a digital circuit, etc., for sensing the state of the semiconductor substrate, e.g., the substrate temperature, is formed on the same substrate in addition to the driving circuit, an ink supply port is located at the center of the substrate and a heater is disposed at a position opposing the port.
FIG. 5 is a diagram schematically illustrating a semiconductor substrate for an ink-jet printhead of this type, i.e., a semiconductor substrate for an ink-jet printhead that includes a circuit for outputting a digital signal indicative of sensed temperature.
In FIG. 5, reference numeral 500 denotes a substrate obtained by integrally forming heaters and driving circuits by semiconductor process technology, 501 a heater/driver array having a structure in which a plurality of heaters and driver circuits are arrayed, and 502 an ink supply port for supplying ink from the reverse side of the substrate.
Further, reference numeral 503 denotes a shift register for temporarily holding print data to be printed. Reference numeral 507 denotes a decoder circuit that outputs a heater-block selection signal for driving the heaters in the heater/driver array 501 on a per-heater-block basis. Reference numeral 504 denotes an input circuit that includes a buffer circuit for inputting a digital signal to the shift register 503 and decoder 507. Reference numeral 510 denotes an input terminal that includes a terminal for supplying logic-element voltage VDD, a terminal CLK for inputting a clock and a terminal for inputting print data, etc.
FIG. 7 is a timing chart for describing a series of operations up to sending of print information to the shift register 503 and supplying of current to heaters to drive the same.
Print data is supplied to DATA_A and DATA_B terminals in sync with a clock pulse applied to the CLK terminal. The shift register 503 stores the supplied print data temporarily and a latch circuit latches the print data in response to a latch signal applied to a BG terminal. A block signal, which is for selecting a group of heaters that have been partitioned into a desired block, and the print data that has been latched by the latch signal are subsequently subjected to an AND operation in matrix form, and the heater current flows in sync with an HE signal that directly decides current drive time. This series of operations is repeated block by block to perform printing.
FIG. 6A is one segment's worth of an equivalent circuit for driving current into a heater for discharging ink. Further, FIG. 6B is an equivalent circuit that corresponds to one bit of a shift register and latch circuit for temporarily storing image data to be printed.
A block select signal that is input to an AND gate 601 is a signal sent from the decoder 507 for selecting heater groups partitioned into blocks. Further, a bit signal that enters the AND gate 601 is a signal transferred to the shift register 503 and thenceforth latched by a latch signal. In order to turn on each segment selectively by print data, the AND gate 601 obtains the AND, in matrix form, between the block select signal and bit signal.
Reference numeral 605 denotes a VH power-supply line that serves as a power supply for heater drive, 606 a heater and 607 a driver transistor for passing current into the heater 606. Reference numeral 602 denotes an inverter circuit for receiving and buffering the output of the AND gate 601. Reference numeral 603 denotes a VDD power-supply line that serves as a power supply for the inverter circuit 602. Reference numeral 608 denotes an inverter circuit serving as a buffer for receiving the buffered output of the inverter circuit 602. Reference numeral 604 denotes a VHT power-supply line serving as a power supply, which is supplied to a buffer 608, for supplying the gate voltage of the driver transistor.
In general, the inverter 602 and shift register 503, etc., are digital circuits and they basically operate in accordance with low/high pulses. Further, applied pulses for interfacing print information of the printhead per se and for driving the heaters also are digital signals, and an exchange of signals with the outside is performed in its entirety by low/high logic pulses. Generally the amplitudes of these logic pulses are 0V/5V or 0V/3.3V, and the power supply VDD of the digital circuits is supplied with a signal one of these voltages. Accordingly, pulses having the amplitude of the VDD voltage are input to the AND gate 601 and are input to the inverter circuit 608 of the next stage through a buffer constituted by the two-stage inverter circuit 602.
On the other hand, the smaller the resistance value of the driver transistor 607 when the latter is in the ON state, or the so-called ON resistance, the better. By making power consumed by components other than the heaters as small as possible, a rise in substrate temperature can be prevented and it is possible to drive the printhead stably. If the ON resistance of the driver transistor 607 is large, a voltage drop ascribable to heater current that flows through this portion increases and it becomes necessary to apply an excessively high voltage to the heaters. The result is wasteful power consumption.
In order to reduce the ON voltage of the driver transistor 607, the voltage applied to the gate of this transistor is required to be set high. In the circuit illustrated in FIG. 6A, therefore, it becomes necessary to provide a circuit for making a conversion to pulses having a voltage amplitude higher than the voltage VDD. In the circuit shown in FIG. 6A, the power-supply line 604 of voltage VHT higher than voltage VDD is provided and a segment selection signal that has entered in response to the pulse having the amplitude of the voltage VDD is converted to a pulse having the amplitude of voltage VHT by a buffer circuit that includes the inverter circuit 608. After the conversion is thus made to the pulse having the amplitude of voltage VHT, the pulse is applied to the gate of the driver transistor 607. In other words, an arrangement is adopted in which the exchange of signals with the outside and signal processing by the internal digital circuit are performed in their entirety by pulses having the voltage amplitude (voltage for driving the logic circuits) of VDD, and each segment is provided with a circuit (pulse-amplitude converting circuit) for effecting a conversion to pulses of the VHT voltage amplitude (the voltage for element drive) immediately before the gate of driver transistor 607 is driven.
In general, a printhead-takes on a form in which a plurality of individual segments are arrayed at a high density, and therefore in a case where the segments are arrayed at a density of, e.g., 600 dpi, segment width in the array direction is limited to about 42.3 μm. If it is attempted to fit the entirety of the circuit of the kind shown in FIG. 6A in this pitch for driving each of the elements, then the length of each segment will increase in a direction perpendicular to the array direction.
FIG. 10 is a circuit diagram of an equivalent circuit in a case where the pulse-amplitude converting circuit in FIG. 6A is shown in detail. It will be understood from observing this diagram that the pulse-amplitude converting circuit, particularly a level converter indicated by the dashed lines, is composed of a number of transistors, and therefore a greater chip area becomes necessary.
However, when the layout structure of the printhead substrate having the above-described construction is considered, the pulse-amplitude converting circuit provided for each segment leads to an increase in the length of each segment, invites an increase in chip size and raises cost. More specifically, with the above-described layout, the chip becomes larger in a direction perpendicular to the segment array and the increase in chip size becomes pronounced. Further, in a case where the pulse-amplitude converting circuit is provided for every segment, e.g., in a case where consideration is given to a printhead having, e.g., 256 segments, the number of buffer circuits required necessitates at least 256 inverters. This invites a decline in yield and in a more complicated circuit structure and is a cause of higher cost.